1. Field of the Invention
The present invention relates to a two-stage decoder circuit, more particularly, to a two-stage decoder circuit wherein malfunctions caused when an address is changed are eliminated.
2. Description of the Related Art
A multistage decoder circuit is often used as the decoder circuit in a semiconductor integrated circuit (IC) of a semiconductor memory device. Such a multistage decoder circuit can be operated using a small amount of electric power and requires only a few circuit elements. Multistage decoder circuits, however, suffer from double selection and other problems due to the rise of the non-selected output when the address is changed. Therefore, measures must be taken to eliminate these problems.